$Taiwan Semiconductor (TSM.US)$Plans to raise advanced packaging prices by 10%–20%: The bottleneck in AI computing power has shifted from capacity constraints to cost considerations.
The Zhitong Finance app has learned, according to supply chain sources,$Taiwan Semiconductor (TSM.US)$It is preparing to raise prices for advanced packaging processes by 10%–20%, citing surging demand for AI chips that is straining production capacity. If this plan is implemented,$NVIDIA (NVDA.US)$、 $Advanced Micro Devices (AMD.US)$The costs for chip manufacturers will be driven up,$Apple (AAPL.US)$iPhones and MacBooks may also face新一轮 price hikes—both product lines have already seen price increases due to rising memory chip costs.
The price hike applies to CoWoS (Chip on Wafer on Substrate, a substrate-level packaging technology that integrates logic chips with high-bandwidth memory [HBM] into a single package). Reports indicate that demand for advanced packaging is spilling over from GPUs to server CPUs and custom ASICs, leading to tight capacity; Taiwan Semiconductor's monthly CoWoS capacity is expected to exceed 130,000 wafers by 2026 and further rise to over 200,000 wafers by 2027. Taiwan Semiconductor is the world's largest foundry, and its major customers also include$Broadcom (AVGO.US)$、$Qualcomm (QCOM.US)$With MediaTek.
Where does pricing power come from: a curve in which capacity fails to keep pace with demand.
Advanced packaging has been able to raise prices because it currently represents the most significant physical constraint on AI chips. Taiwan Semiconductor's monthly production capacity for CoWoS has expanded from approximately 13,000–16,000 wafers in 2023 to about 70,000 by the end of 2025, with projections exceeding 130,000 by the end of 2026 and reaching roughly 200,000 in 2027. Earlier, Taiwan Semiconductor Chairman C. C. Wei stated plainly at an investor briefing that packaging capacity is "so tight that it's constraining customer growth."
The demand-side slope is steeper. According to Morgan Stanley's industry-chain survey, global CoWoS demand will be approximately 1.394 million wafers per year in 2026 and about 2.694 million in 2027, with NVIDIA accounting for roughly 60% in 2026—dropping to around 45% in 2027—mainly due to the rising share of ASICs developed in-house by cloud providers. UBS Group, on the other hand, estimates 1.307 million wafers in 2026 and 2.475 million in 2027. Although the two sets of figures differ, both point to the same conclusion: the pace of capacity expansion cannot keep up with demand.
The market's own pace of expansion is also validating price increases: According to Yole Group's 2025 report, the global advanced packaging market reached US$46 billion in 2024, up 19% year over year, and is projected to exceed US$79.4 billion by 2030; meanwhile, DIGITIMES Research forecasts that the global data center AI chip packaging market will grow from US$5.6 billion in 2024 to US$53.1 billion by 2030, at a compound annual growth rate of approximately 45.5%.
Currently, AI chip testing cycles are longer, further exacerbating pressure on packaging and testing capacity; lead times for chip equipment have stretched from the previous 3–6 months to 6–8 months. Taiwan Semiconductor's downstream customers "place orders as long as they can commit to delivery dates," leaving them with no room to negotiate prices. The same report also noted that Taiwan Semiconductor, which typically negotiates price reductions with suppliers during its annual equipment procurement, has not revisited pricing this year, instead placing orders at the original prices.
Who will foot the bill: NVIDIA's gross margin, Apple's second price hike
For NVIDIA, the impact is most direct—its data-center GPUs are heavily reliant on CoWoS. Any increase in packaging costs will either squeeze its own gross margins or be passed on to downstream cloud providers and end customers. For Apple, the pressure is cumulative rather than new: According to TrendForce's September estimates, the bill-of-materials cost for the 256GB iPhone 18 Pro has risen by roughly 38% year over year, with the share attributable to storage chips climbing from about 10% a year ago to 34%. The procurement price of 12GB DRAM has surged from $39 to $145, while that of 256GB NAND has jumped from $13 to $51, and the firm projects that the storage component's share will exceed 40% in the first half of 2027. The agency forecasts that the new model's retail price will rise by 10%–20%. During the July earnings call, Tim Cook described this round of memory price hikes as a "once-in-a-century flood." Price increases are already underway: according to an analysis by The Paper comparing official list prices, the 256GB version of the iPhone 18 Pro series now carries a domestic starting price that's 1,000 yuan higher than the previous generation, while the top‑end 2TB iPhone 18 Pro Max has seen a price hike of 3,500 yuan; Macs and iPads also underwent a round of price adjustments in June.
Broadcom, Qualcomm, and MediaTek all appear on the customer list; while the direction of pressure is the same, the magnitude differs— their package sizes and the number of HBM stacks are generally smaller than those of top-tier AI accelerators.
This creates a notable transmission chain: AI data centers first siphon off storage capacity, forcing consumer electronics to absorb the resulting price hikes; now, even the packaging stage—processes that sit closer to AI—are also set to increase in price, adding yet another layer to the cost structure of consumer electronics.
Alternative routes are taking shape.
A longstanding pattern in the semiconductor industry is that whether a foundry can sustain price hikes hinges on whether its capacity utilization remains sufficiently high and whether alternative capacity was already established years ago. CoWoS currently finds itself in precisely this position; however, there remains a gap between signaling intent and actual implementation, as it still requires lengthy contract negotiations with customers.
The alternative capacity is far from a blank slate. Intel's EMIB‑T and Samsung's I‑Cube/X‑Cube are already taking on some orders from the ASIC segment, while packaging and testing firms such as ASE and Amkor are handling the overflow. However, the companies that have taken on these orders mostly focus on relatively mature product categories like CoWoS‑S/R; the most advanced CoWoS‑L remains reserved for Taiwan Semiconductor. It should also be noted that this price hike applies specifically to high‑end heterogeneous packaging solutions like CoWoS, which are geared toward AI, and does not extend to Taiwan Semiconductor's entire packaging portfolio. Other mature technologies, such as InFO, have not yet been reported to see a corresponding price increase.
Industry observers believe that the key lies in where the foundry's price hikes ultimately land—if Taiwan Semiconductor absorbs them into its blended average pricing and gross margin, that would represent an improvement in its profitability; but if the increases are merely passed down the supply chain, it would amount to nothing more than inflation for the entire AI ecosystem.
Putting Taiwan Semiconductor's third-quarter report on the table makes the impact of price hikes even clearer. The report, released on October 15, showed that Q3 revenue reached US$46.72 billion, up 41.2% year over year, with a gross margin of 66.4%, an operating profit margin of 58.7%, and a net profit margin of 51.1%. For the fourth quarter, the company guided revenue of US$52.3–54.3 billion and a gross margin of 65%–67%. It also raised its full-year U.S. dollar revenue growth forecast to around 44%, while keeping capital expenditures steady at US$60–64 billion. On October 20, Deutsche Bank maintained a "Buy" rating with a target price of NT$3,000, and revised upward its 2027 and 2028 capital expenditure forecasts to US$84 billion and US$100 billion, citing C. C. Wei's remark: "We have no intention of handing out our advantages; we aim to capture every possible business opportunity." At the same earnings call, the company stated that five‑times‑the‑size mask packaging is already in mass production with good yields, and it is advancing nine‑times‑and fourteen‑times‑the‑size solutions, while leveraging CoPoS panel‑level packaging to meet demands for larger sizes and cost reductions. During the quarter, high‑performance computing (HPC) platforms accounted for 68% of revenue, and advanced processes at 7 nanometers and below represented 79% of wafer sales value.
The price hike is both a fulfillment of pricing power and an advance payment for expanded production. What truly determines the nature of this news is whether it ultimately impacts Taiwan Semiconductor's gross margin or the cost sheets of NVIDIA and Apple—and the answer will have to wait until customer long-term contract negotiations and Taiwan Semiconductor's official stance are revealed.
Editor/Deng