Citi has$Micron Technology (MU.US)$significantly raised its target price for the stock from USD 425 to USD 840 and maintained a 'Buy' rating, citing expectations that the company will increase prices for dynamic random-access memory (DRAM).
Analysts stated: 'We have raised Micron's price target from USD 425 (5x our estimated 2027 calendar-year EPS) to USD 840 (8x our estimated 2027 calendar-year EPS), as we believe Micron will raise DRAM prices by over 40% in the second calendar year following Samsung’s 100% price hike in the first calendar year. Additionally, we expect the DRAM upcycle to extend through the 2027 calendar year and anticipate HBM [high-bandwidth memory] pricing to rise next year.'
"Most of this year's DRAM price increases have been driven by supply-demand imbalances in commoditized or non-HBM DRAM. Although, given recent guidance from device manufacturers such as$Applied Materials (AMAT.US)$indicating over 30% growth in system-on-silicon sales, we believe DRAM bit supply growth is on track to reach 30% by the end of 2026. However, additional new wafer capacity will still be required to meet AI demand in 2027. We have aligned Micron Technology’s forecasts with Citi’s research view that average selling prices (ASPs) for DRAM will surge 200% year-over-year in 2026, while NAND ASPs will rise 186% year-over-year in the same period."
South Korean firms SK hynix and Samsung Electronics rank among the world’s largest memory chip manufacturers. SK hynix is a primary supplier of NVIDIA’s HBM chips. Samsung and Micron compete with SK hynix in this segment.
Citi analysts noted that HBM supply remains tight. They added that, given the 3-to-4 wafer conversion ratio and the margin differential between HBM and the commoditized market, memory manufacturers currently lack incentives to convert or add incremental HBM capacity.
The 3-to-4 wafer conversion ratio typically refers to the physical switching or processing cost comparison between 3-inch and 4-inch semiconductor substrates.
Analysts further noted that due to tight HBM capacity, they expect HBM pricing to rise in 2027, and memory manufacturers will remain disciplined in ramping supply to avoid prompting AI data centers to reduce HBM content next year. They cited Cisco’s recent decision last week to cut DRAM content by 50% across more than 20 projects, including wireless products, in response to strong pricing.
The manufacturing process for HBM is unique, involving the most complex advanced packaging techniques the memory chip industry has seen to date, including through-silicon vias (TSVs) and yield challenges. Strict cleanroom limitations and higher green energy efficiency requirements hinder rapid capacity expansion to respond to skyrocketing prices. Traditionally, when prices are highly favorable for memory chip manufacturers, supply typically increases quickly. However, the industry currently faces numerous structural constraints—especially as the extremely complex manufacturing and packaging processes for HBM increasingly occupy capacity, while general DRAM/NAND supply elasticity remains insufficient, and AI-driven demand growth continues to exceed expectations.
During the first-quarter earnings call,$Micron Technology (MU.US)$management specifically highlighted surging demand for high-capacity data center SSDs targeting AI infrastructure, KV cache deployments, and PCIe Gen6 SSDs tied to NVIDIA’s AI computing infrastructure clusters. This indicates that AI-related storage chip demand is significantly broader than many Wall Street analysts had anticipated. Modern AI infrastructure not only consumes more HBM memory but also requires higher-bandwidth DRAM, greater storage capacity, and high-speed SSD infrastructure to support growing retrieval and agentic AI (i.e., AI agent) workloads. Emerging AI applications—including robotics, multi-agent AI systems, and multimodal reasoning models—are continuously creating new vectors of storage demand, implying that AI storage intensity could continue to grow exponentially even after initial AI deployments are complete.
As$Micron Technology (MU.US)$Senior Vice President and General Manager of the Data Center Business Unit, Jeremy Werner, revealed in a recent interview, from the perspective of the underlying engineering logic of AI data center data flow processing, the fundamental driver of this rally is not simply that 'AI requires more computing chips,' but rather that the era of AI inference dominated by AI agents such as Claude Cowork and OpenClaw has pushed memory/storage from auxiliary components to become system bottlenecks.
AI training relies more heavily on large-scale parallel computing, whereas inference—especially for long contexts, multi-turn dialogues, and Agentic AI workflows—requires continuously saving KV Cache, context states, and intermediate results. When memory/storage space is insufficient, models are forced to recalculate historical states, leading to decreased GPU utilization and higher token generation costs. As such, HBM, DDR5, LPDDR, enterprise-grade SSDs, and even HDDs/data lakes are forming an 'AI memory chain' extending from near-GPU storage to remote storage, determining the throughput, latency, concurrency, and per-token economics of AI systems. This is also why stocks of memory and data storage companies like Micron, Samsung, SK Hynix, Sandisk, and Western Digital have surged together: demand is not concentrated solely in HBM but is spilling over across the entire AI server architecture, encompassing DRAM, NAND, SSD, and HDD.
Editor/melody