① Micron executive Sumit Sadana stated that the current memory shortage spans multiple market segments, and even with the company advancing roughly 20 capacity‑expansion projects worldwide, meaningful additional supply will not begin ramping up until 2028. ② He further noted that long-term supply commitments, joint R&D initiatives, and growing demand for edge‑side AI and robotics are reshaping the storage industry's business model.
Cailian Press, September 16 (Editor: Shi Zhengcheng) — On Tuesday, local time,$Micron Technology (MU.US)$Sumit Sadana, Senior Advisor to the CEO and former Executive Vice President and Chief Commercial Officer, systematically outlined in an interview the supply-and-demand dynamics of the storage industry, shifts in business models, and the challenges of capacity expansion in the AI era.
Most notably, even as Micron is sharply increasing its capital expenditures and advancing roughly 20 capacity‑expansion projects worldwide, the current severe memory shortage is unlikely to ease in the near term. Sadana expects that meaningful additional supply will not begin ramping up until 2028; as for when supply and demand will rebalance, Micron currently "sees no clear timeline."
The signals emanating from this interview go far beyond the mere "memory shortage." From multi-year supply agreements and co‑development with customers to edge‑side AI and humanoid robots, AI is transforming memory—from a highly standardized, cyclical commodity—into a core component that determines system performance, power consumption, and even product competitiveness. This shift is fundamentally reshaping the storage industry's long‑standing business model.
I. Micron Still Sees No Sign of Supply-Demand Balance
First, the narrative of supply tightness—still underpinning the "storage supercycle"—remains intact.
Sadana stated that, compared with a year ago, the supply-and-demand dynamics in the memory industry have shifted significantly. The current memory shortage is no longer confined to select high-end products; it now spans all market segments.
More critically, customer demand continues to be revised upward. Micron's annual demand forecasts from its customers are steadily rising, and even with suppliers ramping up production at full capacity, it remains unclear when supply will be able to catch up with demand.
The underlying root cause is the critical role that storage chips play in AI performance.
Sadana noted that in the past, assessments of computing system performance typically focused on CPUs or GPUs. However, the performance of AI systems is increasingly determined by memory capacity, memory performance, and the bandwidth of data transfer between the processor and memory.
Large AI models must reside in memory, and during both inference and training, vast amounts of data are repeatedly moved. If memory capacity is insufficient, the model cannot be fully loaded; if bandwidth is inadequate, even high-performance processors will be unable to fully unleash their computational power due to data‑transfer bottlenecks.
Sadana argues that memory capacity and memory performance have become the two key metrics for assessing the capabilities of AI systems, while the bandwidth between the processor and memory may emerge as a critical bottleneck for the entire system.
II. Memory has evolved from a standardized commodity into a differentiating tool.
Several years ago, most customers relied on JEDEC‑compliant standard memory, with products procured from various vendors being highly similar, making it difficult for memory manufacturers to differentiate themselves through custom designs.
Sadana noted that AI has transformed this paradigm. Today, customers seek to leverage memory architectures to boost system performance and reduce power consumption, thereby gaining a competitive edge. In response, Micron is now engaging earlier in its customers' multi-year product roadmaps, working collaboratively to define the memory capabilities required for next‑generation systems.
Taking the collaboration between Micron and NVIDIA as an example, Micron was the first to introduce low-power DRAM into data centers and for a considerable period served as the sole supplier in this field. Compared with traditional DRAM, low-power DRAM can simultaneously enhance density, form factor, performance, and power efficiency—factors that are especially critical for data centers facing increasingly tight power constraints.
III. Long-Term Supply Agreement
As is well known, amid tight supply conditions, Micron is signing "strategic customer agreements"—commonly referred to as long-term contracts—with certain customers.
In the past, memory procurement agreements typically lasted only one year, with customers' purchasing decisions and suppliers' ability to deliver heavily contingent on prevailing prices and market supply-and-demand conditions. Under the new strategic agreement, both parties are required to make multi-year commitments: Micron secures its supply, while the customer locks in its demand.
Sadana stated that these agreements must deliver sufficiently clear returns on investment to enable Micron to justify its capital expenditures over the coming years. Long-term contracts are expected to enhance visibility into revenue and demand, while also mitigating, to some extent, the cyclical volatility of the traditional memory market.
He particularly emphasized that the advances in AI technologies underpinning these long-term demands are "building on one another and reinforcing each other." From large-scale models to AI agents and intelligent systems, the wave of "physical AI" is now well underway.
IV. Demand for Agent AI, Physical AI, and Edge AI Will Build Upon One Another
Sadana believes that today's data-center AI is not the end of memory demand. Going forward, embodied AI and physical AI will emerge as new drivers of growth.
These demands will not simply replace those of the previous wave; rather, they will叠加 (stack) on top of one another: training large models will continue, and inference scales will keep expanding; AI agents will add new computational workloads on this foundation; meanwhile, autonomous driving, industrial equipment, and robotics will further bring AI into the real world.
He stated, "These demands will overlap rather than one replacing the other."
Accordingly, the supply side faces a challenge that goes beyond merely meeting current data center construction needs—it must also build capacity to support multiple waves of AI demand.
Sadana also anticipates that, as AI capabilities shift from the cloud to edge devices, future automobiles, PCs, smartphones, industrial equipment, and new AI-native terminals will all incorporate more powerful on-device models—this, in turn, will drive demand for storage chips.
Edge models must operate within constrained power budgets and battery capacities. They need to be large enough to deliver meaningful functionality to users, yet small enough to fit entirely on the device, eliminating the need to send every request to the cloud.
V. Humanoid robots may become the next major market for DRAM and NAND.
In Sadana's view, robots could become a major source of storage demand in the latter half of this decade and into the 2030s.
In the early stages, humanoid robots will primarily operate in structured environments such as factories, performing tasks with well-defined objectives and limited degrees of freedom. As their cognitive and locomotion capabilities improve, they will gradually expand into more complex, unstructured settings like homes.
Sadana forecasts that each humanoid robot could be equipped with hundreds of gigabytes of DRAM and several terabytes of SSD NAND. Compared to smartphones or PCs, this translates into a very high per-unit storage value. Once humanoid robots achieve large-scale production, they will simultaneously boost demand for both DRAM and NAND.
He even believes that humanoid robots could become "one of the largest product markets in history," though their widespread adoption will still take considerable time.
VI. Storage cooperation models are increasingly resembling ASIC customization.
To achieve differentiation in the AI hardware market, some customers have begun engaging with Micron to co‑develop R&D roadmaps spanning five to seven years. Memory is no longer integrated only after processor design is finalized; instead, it is incorporated into joint system‑level design from the earliest stages of development.
Sadana stated that it is challenging for customers to engage in such intensive joint R&D efforts with a large number of suppliers simultaneously. These types of projects typically involve only one or two memory manufacturers, with the partner potentially becoming an exclusive supplier for a certain period, while other vendors may take several years to catch up.
This relationship is increasingly resembling the ASIC customization model: customers invest more R&D resources and participate in product definition, while memory vendors secure longer‑term, more stable product demand.
VII. Micron has approximately 20 expansion projects worldwide.
Sadana revealed that Micron's capital expenditures for fiscal year 2025 (ending last August) were slightly above $13 billion, with the company projecting that figure to nearly double in fiscal year 2026 and potentially exceed $45 billion in fiscal year 2027. Additionally, Micron has increased its long-term U.S. investment plan from $200 billion to $250 billion and advanced the timeline for certain investments.
Overall, Micron has approximately 20 investment projects worldwide, varying in scale and type.
Regarding specific project progress, Sadana stated that the ID1 fab in Idaho is expected to begin shipping its first wafers in mid-2027, while the ID2 fab is slated to start production around late 2028. In New York State, four fabs are planned, with the first one projected to achieve production by 2030. Meanwhile, Japan, Singapore, and Virginia in the United States are also advancing capacity expansions.
These projects span both front-end and back-end processes, including wafer fabrication and packaging & testing, but most of them will not translate into actual supply in the short term.
Funding and equipment are not the only constraints facing capacity expansion. Globally, data centers, power plants, wafer fabrication facilities, and packaging-and-testing hubs are being built in parallel, generating substantial demand for highly skilled engineering, construction, and equipment‑installation professionals.
Sadana stated that there is currently a shortage of qualified professionals capable of constructing advanced semiconductor facilities, and that once the fab is completed, there will likewise be a shortage of technical personnel to operate and maintain the production lines.
VIII. 2028 is merely the starting point for new supply.
Despite the substantial expansion efforts, Sadana cautions that wafer fabs cannot be built overnight. A new fab must undergo regulatory approval, infrastructure development, equipment installation, commissioning, and yield ramp-up; moreover, a cluster of fabs must reach a critical scale to cross the cost‑curve inflection point.
Regarding forecasts for key capacity‑expansion milestones, he stated: "Truly meaningful additional supply will not begin to ramp up until 2028."
Sadana expects that 2028 will mark only the initial ramp-up, with additional capacity gradually scaling up over the following years. Micron's capacity expansion is expected to continue for the next decade or even longer.
As for when the memory industry will ultimately reach a new supply‑demand equilibrium, Sadana reiterated that Micron currently remains unable to provide a definitive answer.
9. The advanced memory's full manufacturing cycle can extend up to five months, and HBM is even more complex.
Sadana concluded by emphasizing that advanced storage is not a standardized product that can be rapidly replicated. DRAM wafer fabrication involves roughly 2,000 process steps, and the entire production cycle—from wafer fabrication to final product delivery—typically spans about five months.
Among these steps, front-end wafer fabrication takes nearly four months, while assembly, packaging, and testing require an additional one to one-and-a-half months. The more complex the product, the longer the lead time.
This is especially true for HBM. Take 12-layer stacked HBM as an example: it requires vertically stacking 12 DRAM dies on a base die, then connecting them to the GPU, while simultaneously addressing power consumption, thermal management, and packaging challenges posed by high-speed data transfer.
The complexity of NAND is also increasing. As products evolve from over 200 layers to 300 layers and beyond 400 layers, manufacturing challenges continue to mount. Meanwhile, the capacity of a single SSD can now reach approximately 245 TB, requiring ultra‑high‑density storage in an extremely compact form factor while maintaining reliability.
Editor/Deng